A semiconductor memory device, for example, a NAND type memory device, which includes three dimensionally arranged memory cells, for example, comprises a plurality of electrode layers stacked on a substrate and a semiconductor layer extending therethrough. The memory cells are provided at parts respectively, where the semiconductor layer intersects each electrode layer. When the structure is miniaturized in such a memory device, defects are likely to be generated in the semiconductor layer through the manufacturing process, resulting in a reduction of manufacturing yield. Consequently, a large number of memory cells may have electrical deviations induced in device characteristics such as threshold voltage. Thus, there is a demand for the structure where fewer defects are generated in the course of miniaturization, and thereby, the reliability of the semiconductor memory device can be improved.